A Makefile is a file used by the make tool to automate the compilation of programs. Here are the standard rules and best practices for writing an effective Makefile:

Basic Structure of a Makefile

1. Target: What you want to build (e.g. an executable file).
2. Prerequisites: The files necessary to build the target (e.g. source files).
3. Rule: The command to execute to create the target.

Simple Example

target: prerequisites
    command

Standard Rules

1. Default rule: The first target in the Makefile is the one that will be built by default.

2. Compiling source files:

   • Use variables for compilers and options.
   • Example :

   CC = gcc
   CFLAGS = -Wall -g
   SOURCES = main.c utils.c
   OBJECTS = $(SOURCES:.c=.o)
   TARGET = mon_programme

   $(TARGET): $(OBJECTS)
       $(CC) -o $@ $^

   %.o: %.c
       $(CC) $(CFLAGS) -c $





Phonies: Uses .PHONY for targets that are not files.



   .PHONY: clean
   clean:
       rm -f $(OBJECTS) $(TARGET)






Variables: Uses variables to simplify the management of paths and options.



   CC = gcc
   CFLAGS = -Wall





Dependency management: Uses implicit rules and patterns to reduce repetition.
Automatic dependencies: You can generate dependencies automatically for .o files.




   -include $(OBJECTS:.o=.d)





  
  
  Full Example


Here is a complete Makefile example:



# Variables
CC = gcc
CFLAGS = -Wall -g
SOURCES = main.c utils.c
OBJECTS = $(SOURCES:.c=.o)
TARGET = mon_programme

# Règle par défaut
all: $(TARGET)

# Lien de l'exécutable
# $@ -> $(TARGET)
# $^ -> $(OBJECTS)
$(TARGET): $(OBJECTS)
    $(CC) -o $@ $^

# Compilation des fichiers .c en .o
# $ Premier element des pr
%.o: %.c
    $(CC) $(CFLAGS) -c $




  
  
  Good practices



Indent with tabs: Commands in rules must be indented with tabs, not spaces.
Comment code: Uses comments to explain sections of the Makefile.
Group files: If your project contains multiple files, organize them into subdirectories and use variables to manage the paths.
Use implicit rules: Take advantage of make's built-in rules to avoid rewriting common rules.



  
  
  Why use .PHONY?

• Avoid conflicts: If a file with the same name as a target exists, make will think that the target is up to date and will not execute associated commands. .PHONY avoids this.

• Performance Improvements: Phony targets are always considered "to do", which may improve the speed of execution of associated commands.

Why use %.o:%c for compilation?

• Efficiency: Using %.o:%c allows you to benefit from make optimization to only recompile what is necessary.

• Practical: For larger projects, %.o:%c is much more suitable.

Conclusion

A well-structured Makefile makes project management easier and avoids compilation errors. By following these rules and best practices, you can create an efficient and maintainable Makefile.